AFE822x SDR-Net (Dual Channel) - SDR structure diagram description



AFE8220 SDR-Net  is based on the new  integrated circuit AFE8220 and uses same PCB size as  single channel AFEDRI SDR-Net of previous revisions.

The difference between AFE822x SDR-Net and  AFEDRI SDR-Net x2 Dual Channel versions is next:

1. Single Dual Channel AFE8220 Front-End is used in new design. 

The Structure Diagram of AFE822x SDR-Net  can be found on the picture below:


There is short structure diagram description:

LPF - Low Pass Filter, in default configuration is using as anti-aliasing filter for from DC to ~28MHz (or any frequency located below Nyquist limit).

VGA - Variable Gain Amplifier, it is built using AD8369 IC from Analog Devices, and adjusted in in this design to give amplification/attenuation of input signal from -10dB up to 35dB.

Direct Sampling Receiver Front End - i.e Analog Front End is built on AFE8220 integrated circuit, it is heart of SDR, that providing Input RF signal ADC sampling, mixing and digital filtering, base-band signal data is outputs through specific serial interface, that very similar to I2S but not 100% compatible, for example used in my design CPU, need external help from CPLD, to accept data incoming data. More information about you can find in datasheet. Please pay attention that this device is not recommended  by Texas Instruments for new design, but there is many way to achieve this integrated cuicuits from different sources. And I am sure HAM radio society can use it in their applications.   

CPLD - main function of this device to convert AFE8220 integrated circuit base-band (output data) serial protocol to  communication protocol that is supported by microprocessor.

CPU - it ARM Cortex-M3 architecture microprocessor - STM32F207VC , from ST Microelectronics, it controls Analog Frond End by additional SPI control channel, receive processed base-band data from Front End and transfer it to PC using Network interface or USB link and software USB Audio Device and HID device emulation.

Ethernet (RMII PHY) - Ethernet physical layer transceiver, working as interface between LAN (network) and CPU

Power Supply - Whole receiver is supplied from 5V voltage of USB line, and there is three voltages +1.8V -digital, 3.3- digital and 3.3V analog, that generated from single supply voltage.

External Power Supply - Is used as alternative power supply from external DC source, like battery or transceiver power supply, it is  switched DC/DC power supply the SDR. Can work from external sources that gives DC voltage in range 7VDC-10VDC

Power Switch - automatically switches between USB or external voltage source.